Prof. Katsuaki SuganumaJapan
The University of Osaka
| 2020 to present | | specially appointed professor, The University of Osaka |
| 1982 - 1986 | | Osaka University |
| 1986 - 1996 | | National Defense Academy |
| 1996 - 2020 | | Osaka University |
| 1982 - 2010 | | ceramic/metal joining |
| 1990 - 2026 | | lead-free soldering |
| 2000 - 2015 | | printed electronics |
| 2000 - 2026 | | sinter joining |
| 1995 | | Fularth Pacific Award |
| 2014 | | Award of Japan Institute of Electronics Packaging |
| 2021 | | Commendation for Science and Technology by the Minister of Education, Culture, Sports, Science and Technology |
joining, soldering, interface, TEM
Science leading to advanced heterogeneous interconnections
TBA TBA
Lead-Free Soldering and Interconnect/TBA
Semiconductors are complex devices in which heterogeneous materials and components are integrated across scales ranging from a few nanometers to several millimeters. By understanding a wide range of phenomena - from atomic bonding at hetero-interfaces to thermal, electrical, and environmental factors - these devices can achieve not only high performance but also high reliability. Consequently, the underlying fundamental science requires the integration of extensive knowledge across diverse fields.
Currently, in the field of power semiconductors - essential for vehicle electrification and data center power supply - the practical application of wide-bandgap (WBG) semiconductors has begun. This shift demands unprecedented solutions for controlling high voltage and current, reducing energy loss, and managing severe heat dissipation. Meanwhile, in High-Performance Computing (HPC) supporting advanced AI technology, chiplet integration has become an essential technique. Here too, there is a strong demand for structural and material combinations that can connect multiple chips without signal loss. Such solutions must be compact and energy-efficient for autonomous driving vehicles while remaining durable enough to withstand harsh environments, including the extreme temperatures of data centers and the thermal cycling and high humidity required for automotive use. In this presentation, focusing on vehicle electrification, some developments in our group will be outlined for WBG power semiconductors and advanced AI semiconductors. Furthermore, it will be discussed about current technical challenges and the scientific approaches being taken to resolve the above mentioned heterogeneous integration.
Substrate is one of the essential components both for advanced and for power semiconductors. Ceramic substrates are the key insulating components for high power applications. Metal bonded ceramic plates have a long history for many years. Copper bonded alumina (DBC) is one of the typical structures. Nevertheless, thermal expansion mismatch is the fatal drawback for this material combinations resulting in instantaneous failure for automobile power applications. Then aluminum bonded aluminum nitride substrate (DBA) was developed by applying new bonding method, so-called as squeeze casting bonding. To apply world first hybrid car with DBA, not only a series of reliability assessments, but science based proof of the integrity of directly bonded aluminum to ceramics was required to understand the reliability and applicability. In our laboratory, finite element simulation, first principal simulation and high resolution TEM observation of the hetero-interface was provided.
As the other example, the built-up layer formation technology is the one still hot topics for HPC and automotive application. Vertical interconnection of built-up substrates is indispensable. However, micro-via interconnection that connects the upper- and lower-layer has been the origin of serious failures in the market due to miss understanding of quality of via bottom bonding. Nano voids formation in the via bottom increases the weakness of substrates. The weakness of built-up substrates often causes serious failure incidents in the market for many years. This failure issue is sometimes called as “Weak micro-via”. Macroscopic observations of via bottom can be carried out by microstructural observation such as SEM and TEM. Nevertheless, root cause has not been understood yet. Nano voids are really in single nano size and no effective analytical method has been applied. Our group has carried out nano analysis by high resolution TEM, atom probe tomography, and XPS. We discovered the presence of substantial residues in the electroless plated Cu in via bottom of substrates. Followed by this finding, the removal of the residues can suppress the nano voids formation at via bottom. This modification in electroless Cu plating can improve the reliability of substrates. In addition, a new testing method will be proposed based on the understanding mechanism.
Thus, basic science is really needed to support practical applications, especially for applying new materials, new structure, and new function.